90Ω micro coaxial cable for MIPI interface - Micro Coaxial Cable factory-(FRS)

Introduction

MIPI interfaces—MIPI DSIfor displays and MIPI CSI‑2for cameras—are now the default high‑speed, low‑power links in mobile, embedded, and automotive vision. Designers often encounter the term 90Ω micro coaxial cablewhen routing high‑speed differential pairs in compact systems. This article explains what 90Ω micro coax is, why it is (and is not) used for MIPI, how it compares with other common MIPI interconnects, and how to choose and validate it for reliable operation.

MIPI DSI and CSI‑2 at a glance

MIPI is organized in layers: CSI‑2defines the camera data/control packet protocol, while DSIdoes the same for displays. The physical layer in widespread use is D‑PHY, a source‑synchronous, differential interface that supports multiple lanes and operates in high‑speed (HS) and low‑power (LP) modes. Typical D‑PHY implementations target up to 1.5 Gbps per lanein CSI‑2 use cases, with some devices and controllers supporting higher data rates. A key point for interconnect is that D‑PHY specifies 100Ω differential impedancefor its high‑speed differential pairs. This 100Ω target is fundamental when selecting cables, connectors, and PCB traces for MIPI links

What a 90Ω micro coaxial cable is

A micro coaxial cable is a very small‑diameter, fully shielded twisted pair (in this case, one differential pair) with controlled characteristic impedance. The “90Ω” figure refers to the cable’s differential impedance, which is determined by conductor geometry, dielectric constant, and shielding. In the consumer electronics ecosystem, 90Ω micro coax is widely used for LVDS/DisplayPortand some USBhigh‑speed links, where the 90Ω differential standard applies. It is common to see 90Ω-rated micro coax assemblies with very fine conductors (e.g., 40 AWG) and dual‑layer shielding for EMI control. These attributes make 90Ω micro coax attractive when routing dense, high‑speed differential pairs in thin, tight spaces

Why 90Ω micro coax is generally not used for native MIPI DSI/CSI‑2

MIPI D‑PHY’s electrical specification calls for 100Ω differentialterminations. Using 90Ω micro coax for native MIPI links creates a 10Ω (10%) impedance mismatch, which increases differential return loss, raises reflections, and can degrade eye opening and jitter margins—especially at multi‑gigabit‑per‑lane speeds. For this reason, native MIPI designs typically use 100Ω‑controlledPCB traces and cable/connector systems (FPC, micro‑coax rated at 100Ω, or other 100Ω differential links). In practice, you will see 90Ω micro coax used for LVDS/DPcamera or display links, while MIPI links stick to 100Ωsystems or, when distance extension is needed, to alternative long‑reach SerDes standards

When you might still see 90Ω micro coax near MIPI systems

In complex products, 90Ω micro coax sometimes appears in “parallel” high‑speed lanes that are not MIPI D‑PHY but share the same connector/cable routing. Examples include LVDS/DisplayPortdisplay paths, USB 3.xSuperSpeed links, or other differential standards that truly require 90Ω. It is critical in such cases to keep these 90Ω lanes electrically and mechanically isolated from MIPI 100Ω pairs to avoid crosstalk and mode conversion. Always match the connector footprint and impedanceto the actual standard in use; do not assume interchangeability between 90Ω and 100Ω systems

How to extend MIPI beyond short FPC lengths

If the goal is longer reach rather than a specific 90Ω target, the industry offers robust, standardized options:

• •FPD‑Link IIIand GMSLSerDes bridges convert MIPI CSI‑2/DSI to serialized links over coaxial or STP, enabling 10–15 mcable runs with high immunity and low latency. Examples include TI’s DS90UB941AS‑Q1for DSI→FPD‑Link III, and Analog Devices’ MAX9295D(GMSL2 serializer) paired with MAX9290(GMSL deserializer) for CSI‑2 over 50Ω coax or 100Ω STPwith lengths exceeding 15 m. These solutions are widely used in automotive and embedded vision for long‑cable camera/display interconnects61112.
• •For native MIPI over flexible interconnects without SerDes, practical experience shows that keeping FPC lengths under ~300 mm at 1.5 Gbps per lane(and shorter at higher rates) is advisable to maintain signal integrity. When longer flex is unavoidable, consider re‑timers/redrivers, better FPC materials/stack‑ups, or move to a coax‑based SerDesapproach7.
• •Emerging long‑reach MIPI physical layers such as MIPI A‑PHYtarget multi‑meter links with high bandwidth and are standardized for automotive and industrial use. If your system needs both long distance and native MIPI semantics, A‑PHY is worth evaluating7.

Selecting the right interconnect for your MIPI link

• •Match the impedanceto the standard: use 100Ω differentialfor MIPI D‑PHY (CSI‑2/DSI). If you are using LVDS/DP/USB 3.x, use 90Ω differential. Do not mix 90Ω and 100Ω on the same differential pair.
• •Choose the right connector family and pitchfor your channel count and space. Many MIPI camera/display modules use I‑PEX Micro‑Coaxor similar fine‑pitch connectors; ensure the connector’s differential impedance and footprint are specified for your target standard.
• •Control return loss and insertion loss: work with your supplier to verify differential impedance (TDR), insertion loss vs. frequency, and shielding effectiveness. For very high data rates or long lengths, prefer double‑shieldedmicro coax and robust connector shielding.
• •Plan for mechanical strain reliefand flex lifeif the cable will be routed through hinges or moving parts. Micro coax is more fragile than FPC; consider strain‑relief brackets and service loops.
• •When in doubt between FPC vs. micro coax, prefer FPC for very short, dense links (lower cost, easier routing), and micro coax when you need better EMI control, controlled impedance in a tight bundle, or a transition to a longer‑reach SerDes path9.

Validation checklist for MIPI links using coaxial or FPC interconnects

• •Perform TDRon the differential pairs to confirm you are within ±10%of the target impedance (100Ω for MIPI).
• •Measure IL/RLacross the operating bandwidth (e.g., up to several GHz) to ensure the cable/connector loss budget leaves sufficient eye margin at your chosen lane rateand lane count.
• •Validate EMI/EMCwith near‑field scans and compliance tests; ensure shields are continuous and connector ground returns are solid.
• •For long flex or high‑speed designs, use eye‑diagrammeasurements (with appropriate compliance fixtures) and protocol‑level stress tests (frame drops, line errors) under worst‑case temperature and voltage.
• •If you are extending beyond native MIPI range, budget for SerDes equalization(Tx pre‑emphasis, Rx CTLE/DFE) and verify link stability with real‑world cable samples and connectors.

Putting it all together

A 90Ω micro coaxial cableis an excellent choice for standards that specify 90Ω differential impedance, such as LVDS/DisplayPort/USB 3.x, and it offers superb EMI control and mechanical flexibility in compact designs. For native MIPI DSI/CSI‑2, stick with 100Ω differentialinterconnects to meet the D‑PHY specification and preserve signal integrity. When your system demands longer cable reachesthan MIPI can natively support, adopt a coax‑based SerDessolution (FPD‑Link III, GMSL, or A‑PHY), which are purpose‑built for multi‑meter links with high reliability. Understanding the impedance, standard, and reach requirements of your specific interface—and validating with the right measurements—will ensure a robust, high‑performance interconnect for both cameras and displays